INT Forschung aktuell

3. April 2022 / INT

Das INT stellt zwei Paper auf der European Microwave Week 2021 vor.
[Bild: www.eumw2021.com]

120 GBd SiGe-Based 2:1 Analog Multiplexer Module for Ultra-Broadband Transmission Systems

C. Schmidt#, T. Tannert*, J.H. Choi#, C. Caspar#, D. Pech#, S. Wünsch#, G. Ropers#, J. Schostak#, V. Jungnickel#, R. Freund#, M. Grözing*, M. Berroth*
# Fraunhofer Heinrich-Hertz-Institute, Berlin, Germany
* University of Stuttgart, Stuttgart, Germany

Abstract — A 2:1 analog multiplexer (AMUX) module based on a SiGe-HBT IC is presented. The AMUX module offers a 6-dB analog signal path bandwidth of 61 GHz. We show a 120 GBd 4-level pulse amplitude modulation (PAM) signal with the AMUX module fed by two CMOS-digital-to-analog converters (DACs), each with 19 GHz analog 3-dB bandwidth only, thus demonstrating high-baud-rate signal generation with bandwidth-limited CMOS DACs enabled by advanced digital signal processing.

Projektseite

Multi-Phase Clock Path Circuit up to 57 GHz Including 5 bit Programmable Phase Interpolators for Time-Interleaved Broadband Data Converters in a 28 nm FD-SOI CMOS Technology

Daniel Widmann, Tobias Tannert, Xuan-Quang Du, Markus Grözing, Manfred Berroth

Abstract — Clock paths in mixed-signal integrated circuits are critical building blocks possibly determining the entire circuit performance. A precisely controllable clock phase is highly desirable e.g. for monolithic, ultra high-speed data converters with time-interleaving, i.e. digital-to-analog (DAC) and analog-to-digital (ADC) converters, to adjust the time-interleaved converter channels’ timing. More precisely, these converters use the means of analog multiplexing at the DAC outputs or analog demultiplexing at the ADC inputs, respectively. A broadband and low jitter clock path for frequencies up to 57 GHz is presented including 5 bit programmable phase interpolators at half input frequency with a phase delay resolution of about 1.25 ps realized in a 28nm FD-SOI CMOS technology. A combination of current mode logic and CMOS logic is used in the proposed circuit.

Projektseite

 

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