Real-Time Processing and Delta-Sigma Modulation on FPGA for Switching Mode RF Amplifiers
Julian Tonn, Thomas Veigel, Manuel Wittlinger, Markus Grözing, Manfred Berroth
Abstract — A real-time digital signal processing chain, implemented on a field-programmable gate array (FPGA) is presented. The processing chain contains a quadrature amplitude modulation (QAM) mapper, an upsampling filter (USF) and a first order delta-sigma modulator. It is used to generate input symbols for a digital pulse-width and pulse-position modulator (DPWPM) integrated circuit (IC) which supports carrier frequencies of up to 2.7 GHz. However, the FPGA design itself has been proven to work up to 5.9 GHz and therefore covers most of the 5G NR FR1 frequency bands. At 900 MHz, a 14 MBd 256-QAM (112 Mb/s) payload signal with an error vector magnitude (EVM) of 1.94 % and a signal-to-noise ratio (SNR) of 34.3 dB is shown. At 2.7 GHz, a 10.5 MBd 256-QAM (84 Mb/s) signal with an EVM of 4.26 % and an SNR of 27.4 dB is presented.
