Contact
+49 711 685 67892
+49 711 685 67900
Email
Business card (VCF)
Pfaffenwaldring 47
70569 Stuttgart
Germany
Room: 2.408
Subject
My research focuses on the design and characterization of fast and energy-efficient analog computing circuits in 22 nm FD-SOI CMOS technology. These circuits are developed to perform signal processing tasks such as neural network inference and analog equalization directly in the analog domain, aiming to reduce energy consumption and latency compared to conventional digital approaches.
The circuits are intended for use in high-speed optical transmission links, where they enable functions like signal equalization, crosstalk mitigation, and low-latency regeneration in next-generation transceivers. My work includes developing the core building blocks of these circuits and investigating design techniques that take advantage of FD-SOI features to optimize energy efficiency and signal integrity.