Manfred Berroth

Abstract

A compact integrated and high-efficiency polarization mode interferometer in the 220-nm silicon-on-insulator platform is presented. Due to the operation with two polarization modes in a single waveguide, low propagation losses and high sensitivities combined with a small footprint are achieved. The designed and fabricated system with a 5-mm-long sensing region shows a measured excess loss of only 1.5 dB with an extinction ratio up to 30 dB, while its simulated homogeneous bulk sensitivity can exceed 8000 rad/RIU. The combination with a 90°-hybrid readout system offers single wavelength operation with unambiguousness for phase shifts up to 2pi and constant sensitivity.

Abstract

Ultra-high speed and bandwidth ADCs are necessary for communication systems that apply spectral efficient modulation formats to achieve date rates of 100Gbit/s and beyond. These ADCs must have a high absolute input bandwidth, a high sampling speed and good linearity. A key component of these ADCs is the analog front-end section between the analog signal input and the quantizer. This contribution shows some different methods to implement such ultra-broadband ADC front-ends. The first method, suitable for medium-resolution ADCs, is to use a track-hold-less analog front-end with a high-bandwidth input transconductor and a travelling-wave structure for the comparators of the quantizer. This input structure ensures proper alignment between the signal and the clock at all comparators. The method is illustrated by a 40GS/s 4-bit single-core flash-type BiCMOS ADC. For higher resolution ADCs, a linear front-end track-hold circuit is necessary, which can be implemented using a voltage-mode or a current-mode approach. The voltage-mode approach is exemplified by a 12GS/s BiCMOS circuit with track-mode masking and high SFDR in the first and second Nyquist band. The current mode approach is shown by a 25GS/s BiCMOS circuit with a 1dB input bandwidth of 40GHz. To reach even higher sampling rates, the analog input samples can be de-interleaved to several quantizers by means of an analog demultiplexer (ADeMUX). This is illustrated by a current-mode 1-to-4 ADeMUX implemented in BiCMOS running at 112GS/s.

Abstract

Fluorescence-based assays are widespread in the life sciences and used for instance in diagnostics, cell sorting, or to resolve cellular and tissue structures. Optofluidic engineering can help improve such assays, especially when sensitivity or throughput are important. Towards such optofluidic integration we combine a silicon nitride photonic chip including grating couplers for exciting and detecting fluorescence signals out of plane with a soft lithography based microfluidic chip. Through this configuration both the microfluidics and the optics systems are located at different levels. Considering an arrangement of grating couplers for excitation and detection as a sensor module, such modules can be placed multiple times below the microfluidic channels. This is advantageous for implementing complex lab-on-a-chip applications used in point-of-care-testing devices (POCT) or time-resolved analysis of biomolecular dynamics. As a proof of principle, different concentrations of fluorescein (10~µM up to 10~mM) in deionized water are investigated using an excitation-wavelength of 405~nm (-7~dBm laser power). The fluorescent solutions are pumped through a simple microfluidic channel, excited through a grating coupler of about 11~µm x 14~µm in size and detected through a glass fiber near the microfluidic channel and vice versa. The signal detection is done by a spectrometer. By exciting through a grating coupler and recording the fluorescence emission through a glass fiber a limit of detection (LOD) of 73~µM is measured. The spectral location of the emission maxima varies from 518~nm to 526~nm for concentrations of 100~µM to 10~mM, respectively. Overall, the fluorescence detection through grating couplers in microchannels is demonstrated. This can be considered as a first step towards a fully integrated optofluidic chip interface for high density fluorescence assay multiplexing.

Abstract

Today’s ultra-wideband optical equipment enables fiber-based data links with up to 1.6 Tbit/s per wavelength at a symbol rate of 128 Gbaud. However, high input signal path losses need to be overcome in commercial products when the digitizers are integrated with the digital signal processor in a deep-submicrometer FinFET-CMOS transceiver application specific integrated circuit (ASIC). This currently limits the analog-to-digital converter (ADC) sampling rate and the detectable link symbol rate to 97 GS/s and 66 Gbaud, respectively. Four of these bandwidth-limited ADCs can be time-interleaved with the presented analog 1-to-4 demultiplexer front end in a SiGe-BiCMOS technology that allows high bandwidths with transistor cutoff frequencies above 300 GHz. The sampling front end effectively divides the necessary ADC bandwidth by the time-interleaving factor, enabling the detection of ultra-high symbol rates of up to 128 Gbaud with only 16-GHz bandwidth requirement for the four ADCs. At these frequencies, subsequent circuits and chip interconnects exhibit significantly lower signal path losses than at 64 GHz—half the symbol rate—and therefore require only a reduced processing power for channel equalization in the analog and digital domain. We demonstrate sampling operation with a large-signal 3-dB bandwidth of 36 GHz and a 6-dB bandwidth of 50 GHz at 128 GS/s in an experimental testbed, as well as the reception of 128-Gbit/s NRZ/OOK and 256-Gbit/s PAM4 signals. The linearity reaches more than 3-bit effective number of bits (ENOB) with a sinusoidal input signal of 500 mV pp on each of the four output channels. The power consumption is equivalent to a sampling efficiency of 20 pJ/sample, narrowing the gap to slower CMOS solutions and enabling cost-efficient coherent optical links with up to 1 Tbit/s.

Abstract

In this paper the influence of dielectric loss induced noise on a differential charge detection system for cosmic dust trajectory sensors is analyzed. For the sake of generality the distributed charge detector is replaced by compact capacitors with different dielectric materials. It is shown that for low-frequency high-impedance systems the selection of very low loss dielectric materials is of crucial importance to minimize the overall noise charge of the system.

Abstract

In photonic integrated circuits grating couplers are commonly used to establish an efficient and stable fiber-to-chip link. However, the actual coupling efficiency of a fiber-to-chip interface depends strongly on the used wavelength and exhibits a maximum at a distinct target wavelength, determined by grating design parameters. In this paper, an enhancement of the optical bandwidth of silicon grating couplers by adding integrated dispersive structures is discussed. These are realized by single layers, prism-like geometries and additional SiN gratings. Theoretical considerations for a bandwidth-enhancement by dispersive layers are performed and applied to an existing grating coupler design. A simulated 1dB-bandwidth of up to 90 nm at a maximum efficiency of -0.65 dB in the C-band could be achieved, which is an enhancement to a factor of about 2 compared with the original coupler design.

Abstract

A flexible and adaptive energy-efficient high-speed wireless hub is developed in polymer foil as a Hybrid System-in-Foil (HySiF) using Chip-Film Patch (CFP) technology. In this matter, the SiGe BiCMOS silicon chips (2.39 $\times$ 1.65 mm2) are thinned down to 45 mm and are embedded face-up inside a two-polymer CFP carrier. The active pads of the embedded silicon chips inside foil are extended to the surface of the foil to interconnect to the antenna on the foil. The integrated hybrid system has a signal transmission at 5--6 GHz frequency band. The overall thickness of the system is below 100 mm and its bendability is down to 4 mm radius of curvature. The designed and fabricated PA silicon chips operate at 50 mA with a 1.5 V supply voltage. Therefore, in addition to the high lateral thermal resistance of the thinned chip, self-heating loop inside polymer due to the low thermal conductivity of the embedding polymer raises the system temperature. Consequently, the thermal behavior and RF performance of the PA chip under different conditions are investigated. Moreover, the antenna with the required carrier frequency is simulated, fabricated, and measured on top of the polymer foil as a stand-alone system in the flexible CFP.

Abstract

High-speed analog-to-digital (ADC) and digital-to-analog converters (DAC) are key components for the core data network. As network traffic is still growing at an enormous rate, ultra-broadband converters are of uttermost importance. Especially the analog front-end section of these converters, i.e. the analog input of ADCs and the analog output of DACs, imposes severe challenges on the circuit design. SiGe-BiCMOS the technology of choice for the implementation of the these analog front ends, because SiGe bipolar transistors offer both extremely high cutoff frequencies needed for the converter bandwidth as well as large scale integration capability as needed for the complex converter circuitry. The EU/ECSEL project TARANTO does research on both the device speed enhancement as well as on advanced circuit topologies and designs for ultra-broadband analog front-end circuits for AD and DA conversion. This presentation will present solutions for implementing ultra-broadband ADC and DAC front-ends and discuss the main challenges for the corresponding circuit design. We will show practical circuit designs realized in TARANTO by URM1, USTUTT, USAAR and MICRAM as well as a test setup from NOKIA. For the data link receiver, we present very broadband SiGe BiCMOS analog front-end circuits for synchronous (STI) and asynchronous (ATI) time interleaving of AD converters. The STI front-end applies current mode integrating samplers whereas the ATI front-end applies mixers and filters. For the data link transmitter, an ultra-high-speed single-core SiGe BiCMOS DAC core will be shown. Moreover, we introduce the concept of D/A time interleaving with analog multiplexer circuits. Finally, we present a testbed for the test of a STI ADC front-end.

Abstract

We present a theoretical study of 1xN optical routing networks consisting of generalized Mach-Zehnder switches, that are based on multimode interferometers. This work gives a brief overview of the necessary phase conditions and resulting phase shifter requirements in the 1xN switches. Using the presented approach as 1x4 switch with parallel phase shifters, a 20\% phaseshifter-loss reduction becomes possible.

Abstract

The demand for higher fiber transmission capacities pushes research towards increasing channel rates by increasing the symbol rate and/or the spectral efficiency. The majority of today's high-speed transponder base on DSPs with digital-to-analog converters (DACs) on the transmitter (Tx) and analog-to-digital converters (ADCs) on the receiver (Rx) side. The bandwidth of CMOS converters is extremely low 1 and at high symbol rates they are operated beyond their 3-dB bandwidth limit at remarkable attenuation leading to a reduced signal-to-noise ratio (SNR) after conversion 2. The bandwidth increase of CMOS converters is rather limited even after sampling rates have arrived beyond 100 GSa/s. For instrumentation or lab applications real-time oscilloscope ADCs with bandwidths \textgreater50 GHz are available 3. Unfortunately, their power consumption, physical size and limited suitability for co-integration with CMOS signal processors make them unsuitable for application in communication systems. Alternatively, integrated ADC frontends with analog demultiplex functionality have been proposed 4. They support parallel digitization at lower bandwidth and lower sample rate, which strongly relaxes the co-integration with an ADC-DSP. In this paper we present a 112 GSa/s 1-to-4 ADC frontend in IHP 130 nm SiGe HBT BiCMOS with a record frequency coverage up to 50 GHz. The module (packaged IC) has been incorporated into a 100 GBaud PAM4 transmission system with 200 Gb/s gross data rate. Data digitization in the receiver is performed at an electrical bandwidth down to 14 GHz. We report on a feasibility experiment for electrical and optical back-to-back (B2B) as well as optical transmission up to 40 km in distance

Abstract

The design of a highly efficient fiber-to-chip link using a silicon grating coupler with an enhanced optical bandwidth in a 250 nm silicon-on-insulator platform is presented. Consisting of a standard grating coupler with backside mirror and a special dispersive coating, this link offers a simple design and an enhanced 1-dB-bandwidth. Special attention is paid to the influence of the coatingdispersion on bandwidth. Optical simulations demonstrate the performance of the fiber-to-chip links at a wavelength of about 1550 nm and for the transverse electric waveguide mode.

Abstract

Coupling of light from off-chip into highly complex silicon-based devices is currently focus of efforts and research. In this work, the experimental demonstration of a -0.50 dB (89%) coupling efficiency in the C-band with the help of an aperiodic grating coupler design in a 250 nm silicon-on-insulator (SOI) technology is shown. Further, this work reports about the latest results regarding focusing grating couplers with footprints of only 30 µm x 30 µm and a measured coupling efficiency of up to 0.93~dB (81\%) at 1549 nm. Efficient grating coupler arrays are realized by using an expanded backside metal mirror-strip for the application of fiber arrays. In addition, this work presents aperiodic silicon grating couplers with an enhanced bandwidth to overcome the limited usability of grating couplers in wavelength division multiplexing (WDM) systems.

Abstract

A novel concept for digital-to-analog converters (DACs) has been introduced recently, to overcome their bandwidth limitations by combining the outputs of multiple DACs with an analog multiplexer (AMUX). In this paper, a behavioral model for a high-speed 2:1-AMUX is introduced, which significantly reduces the simulation time for a 2:1-AMUX-DAC system. The behavioral model is implemented in Matlab and fitted with simulation data from an electronic design automation tool for a high-speed 2:1-AMUX integrated circuit with a normalized mean square error \textless -20 dB. Eventually, multiple model parameters are varied in order to study their impact on the system's behavior.

Abstract

The dual-mode interferometer (DMI) is an attractive alternative to Mach-Zehnder interferometers for sensor purposes, achieving sensitivities to refractive index changes close to state-of-the-art. Modern designs on silicon-on-insulator (SOI) platforms offer thermally stable and compact devices with insertion losses of less than 1 dB and high extinction ratios. Compact arrays of multiple DMIs in parallel are easy to fabricate due to the simple structure of the DMI. In this work, the principle of operation of an integrated DMI with differential outputs is presented which allows the unambiguous phase shift detection with a single wavelength measurement, rather than using a wavelength sweep and evaluating the optical output power spectrum. Fluctuating optical input power or varying attenuation due to different analyte concentrations can be compensated by observing the sum of the optical powers at the differential outputs. DMIs with two differential single-mode outputs are fabricated in a 250 nm SOI platform, and corresponding measurements are shown to explain the principle of operation in detail. A comparison of DMIs with the conventional Mach-Zehnder interferometer using the same technology concludes this work.

Abstract

We present a rigorous approach for designing a highly efficient coupling between single mode optical fibers and silicon nanophotonic waveguides based on diffractive gratings. The structures are fabricated on standard SOI wafers in a cost-effective CMOS process flow. The measured coupling efficiency reaches -1.08 dB and a record value of -0.62 dB in the 1550 nm telecommunication window using a uniform and a nonuniform grating, respectively, with a 1 dB-bandwidth larger than 40 nm.

Abstract

A highly efficient grating structure for the coupling between standard optical fibers and single-mode waveguides in the silicon-on-insulator platform realized in a CMOS fabrication process is presented. The cost-effective method introduces a backside metal mirror to the grating coupler without need of an extensive wafer-to-wafer bonding. A coupling efficiency of -1.6 dB (around 69\%) near the telecommunication wavelength 1550 nm and a large 1 dB-bandwidth of 48 nm are achieved.

Abstract

Large-signal modeling results of SiGe HBTs with HICUM (High Current Transistor Model)are presented.Moreover,a new and robust method to determine the substrate network elements of bipolar transistors from S-parameter measurements is proposed in this work.The investigated substrate network is compatible with HICUM and includes the substrate- collector depletion capacitance,substrate resistance and capacitance.