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70569 Stuttgart
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Room: 2.401
Subject
High-speed optical communication systems require increasingly faster data conversion and signal processing. To overcome the bandwidth limitations of conventional digital-to-analog converter (DAC), time-interleaved architectures are used, where multiple DAC outputs are combined into a single high-speed analog signal. This functionality is handled by the analog multiplexer (AMUX), which must operate with extremely precise and fast switching.
The goal of this project is to develop a high-speed AMUX capable of supporting symbol rates up to 400 GBd, implemented in SiGe BiCMOS technology, which is well suited for high-frequency analog applications.
As part of this project, my responsibility is to develop the clock doubler circuit, a critical block that generates the high-frequency control signal required for accurate AMUX switching. It produces a clean, low-jitter output at twice the input clock frequency, enabling precise timing at symbol rates up to 400 GBd. My contribution includes the complete flow, from schematic design and layout to post-layout simulation and final measurement of the fabricated chip, focusing on signal integrity, transition sharpness, and reliable high-speed performance.